WIZnet WIZ-IP51S Document System

WIZnet WIZ-IP51S Document System

የተጠቃሚ መመሪያ

MODEL: WIZ-IP51S

የሰነድ ማሻሻያ ታሪክ

ሥሪት ቀን ማስታወሻ
ቪ1.0 2025/08/07 የመጀመሪያ ልቀት

 

The WIZ-IP51S is a network offloading module that integrates the W5100S chip with built-in PHY physical layer and TCP/IP hardware protocol stack. It also includes an RJ45 connector with an integrated network transformer, allowing for seamless interface connection without additional circuit design.

For users looking to quickly develop networked systems, the WIZ-IP51S is an ideal choice. The TCP/IP protocol stack and Ethernet MAC are implemented by the W5100S chip, while the Ethernet PHY is integrated by the same chip.

የምርት ባህሪያት:

  • Integration of W5100S chip with built-in PHY and TCP/IP
    ቁልል
  • RJ45 connector with integrated network transformer
  • Plug-and-play component

 

1. መግቢያ

1.1 በላይview

The WIZ-IP51S is a network offloading module that integrates the W5100S chip (with built-in PHY physical layer and TCP/IP hardware protocol stack) and an RJ45 connector with integrated network transformer. As a plug-and-play component, it enables seamless interface connection between the W5100S and the transformer without the need for additional circuit design.

For users who wish to quickly develop networked systems, the WIZ-IP51S is an ideal choice.

Note: For detailed information regarding the hardware TCP/IP protocol stack, please refer to W5100S datasheet.

  • Network port connector section: Integrated network transformer network port (including W5100S chip, network transformer and RJ45).
  • TCP/IP protocol stack and Ethernet MAC: Implemented by W5100S chip.
  • Ethernet PHY: Integrated by W5100S chip.

1.1.1 ተግባራዊ ባህሪያት

  • Supports full hardware TCP/IP protocol: TCP, UDP, WOL, ICMP, IGMPv1/v2, IPv4, ARP, PPPoE
  • Supports SOCKET-less instructions: ARP-request, PING-request
  • Supports 4 independent SOCKET concurrent communication
  • Supports half-duplex/full-duplex operation mode
  • Supports Ethernet power-off mode and master clock selection energy-saving mode
  • Supports UDP-based network wake-up (WOL) function
  • High-speed SPI interface (MODE 0/3)
  • Built-in total 16Kbytes of send/receive cache
  • Integrated 10BaseT/100BaseTX Ethernet PHY
  • Supports Ethernet auto-negotiation (full/half-duplex, 10Base-T/100Base-TX)
  • Supports Auto-MDIX function (only supported in Ethernet auto-negotiation mode)
  • የአሠራር ጥራዝtage: 3.3V (I/O compatible with 5V signal voltage)
  • 19-pin pin header interface
  • Package size (length×width×height):32.5×16.5×17.3(mm)
  • Compatible with WIZnet’s IO module carrier board development board

1.1.2 የምርት ባህሪያት

  • All-hardware TCP/IP protocol stack network chip W5100S
  • ኤተርኔት
    10/100Mbps Adaptive Ethernet
  • Connect to the host interface
    Standard SPI:MISO、MOSI、CLK、CSn
  • የኃይል አቅርቦት
    Input power supply:3.3V DC
  • ሜካኒካል መለኪያዎች
    Dimensions (length ×width×height):32.5×16.5×17.3(mm)
  • የአሠራር ሙቀት
    Industrial grade: -40~+85℃
  • የማከማቻ ሙቀት
    -40~+85℃,5~95%RH
1.2 የምርት ዝርዝሮች

1.2.1 የኤሌክትሪክ መለኪያዎች

1.2.1.1 Power Parameters

Unless otherwise specified, the parameters listed in Table 1-1 and Table 1-2 refer to the values at a temperature of 25℃.

ሠንጠረዥ 1-1 የኃይል አቅርቦት መለኪያዎች

ቁጥር መስጠት ምድብ ዝርዝር መግለጫ
ዝቅተኛ የተለመደ The greatest ድርጅት
ቪዲዲ ሞጁል ጥራዝtage 2.97 3.3 3.63 V
I ሞጁል ወቅታዊ 124 130 137 mA

 

1.2.1.2 Power Consumption Parameters

ሠንጠረዥ 1-1 የኃይል ፍጆታ መለኪያዎች

የሥራ ሁኔታ የሙከራ ዋጋ
(ኤምኤ)
የሥራ ሁኔታ የሙከራ ዋጋ
(ኤምኤ)
ተጠባባቂ 43 100Mbps Connectionless 42
10Mbps Connectionless 25 100 Mbps for data communication 130
100 Mbps for data communication 130

 

1.2.2 ሜካኒካል ልኬቶች

የሰነድ ስርዓት

1.2.3 የሙቀት ባህሪያት

ሠንጠረዥ 1-2 የሙቀት ባህሪያት

ስም ደረጃ የአሠራር ሙቀት የማከማቻ ሙቀት
WIZ-IP51S የኢንዱስትሪ ደረጃ -40 ~ +85 ℃ -40 ~ +85 ℃

 

2. Hardware Section Description

2.1 Pin Layout Description

Now, we will introduce the pins of WIZ-IP51S and the usage of the IO module carrier board of the accompanying evaluation board respectively.

The appearance of WIZ-IP51S is shown in Figure 2-1.

Figure 2-2 is the pin layout diagram of WIZ-IP51S, and Table 2-1 provides the pin description for WIZ-IP51S.

የሰነድ ስርዓት

Figure 2-1 The external appearance diagram of the WIZ-IP51S module

የሰነድ ስርዓት

ሠንጠረዥ 2-1 ፒን መግለጫ

ፒን ቁጥር የፒን ስም ተግባር
P1 ACT_LED Data reception/transmission activity indicator light
P2 ቪሲሲ 3.3V Power pin
P3 ጂኤንዲ የኃይል መሬት
P4 ሲ.ኤስ.ኤን SPI interface chip selects signal pin, with low level as the effective state
P5 CLK የ SPI ሰዓት ግቤት ፒን
P6 ሚሶ SPI master input, slave output
P8 ሞሲአይ SPI master output from slave input
P9 INTn Interrupt output pin, low level is effective
P10 ዳግም አስጀምር Reset pin, low level effective (must be maintained for at least 500us)
P11 NC የማቆየት ተግባር
P12 NC የማቆየት ተግባር
P13 LINK_LED Network connection indicator light
L1 LED1- Connect to P1
L2 LED1+ Connected in series with the resistor to VCC
L3 LED2+ Connected in series with the resistor to VCC
L4 LED2- Connect to P13
S1 SHILD1 ዛጎል
S2 SHILD2 ዛጎል

 

2.2 Introduction to the Evaluation Board

The IO module carrier board is an evaluation board that facilitates users to test and apply the modules. This evaluation board integrates the mainstream single-chip microcontroller STM32F103RCT6 and the USB to TTL converter chip CP2102.The schematic diagram of the IO module carrier board is shown in Figure 2-3.

የሰነድ ስርዓት

  • The USB Mini interface provides the evaluation board with 5V DC power supply and one serial port for the MCU, which can be used for ISP-style program download and data communication testing.
  • Key Instructions for IO Module Carrier Board

Table 2-2 IO module carrier board Key Instructions

ቁጥር መስጠት ማብራሪያ
RESET(SW1) የሃርድዌር ዳግም ማስጀመር ቁልፍ
BOOT(SW2) Enter the BOOT button of the microcontroller

 

  • Program download method for IO module carrier board

The IO module carrier board supports the ISP download method. The operation steps are as follows: first, press and hold the BOOT button, then press the RESET button once, and finally release the BOOT button. This will enable you to enter the program download mode. Open the ISP tool of STM32 and select the corresponding firmware to complete the download

  • The reference design schematic diagram of the peripheral circuits for WIZ-IP51S is shown in Figure 2-4.

የሰነድ ስርዓት

2.3 Quick Evaluation Board Wiring Instructions

Users can download the corresponding reference code for W5100S from www.w5500.com and burn it onto the IO module carrier board for performance testing and evaluation, as shown in Figure

የሰነድ ስርዓት

3. SPI operations

The SPI configuration method of WIZ-IP51S is detailed in the following W5100S datasheet.

4. የጊዜ ዲያግራም

4.1 ዳግም አስጀምር

የሰነድ ስርዓት

4.2 SPI Access Read Timing

የሰነድ ስርዓት

4.3 SPI Access Write Timing

የሰነድ ስርዓት

ዝርዝር መግለጫዎች፡-

  • Model: WIZ-IP51S
  • ስሪት: 1.0
  • ቀን፡- 2025/08/07

©2025 WIZnet Co.,Ltd. All Rights Reserved.
ለበለጠ መረጃ የእኛን ይጎብኙ webጣቢያ በ http://www.wiznet.io


የሚጠየቁ ጥያቄዎች

What is the main function of the WIZ-IP51S module?

The main function of the WIZ-IP51S module is to offload network processing by integrating the W5100S chip with a built-in PHY and TCP/IP stack, along with an RJ45 connector and network transformer.

ሰነዶች / መርጃዎች

WIZnet WIZ-IP51S Document System [pdf] የተጠቃሚ መመሪያ
W5500PORT, WIZ-IP51S, WIZ-IP51S Document System, Document System

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